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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2023-08-24 11:48:10 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2023-09-11 13:23:52 -0700 |
| commit | 576418e3417267e93ffee09c46f56434108c4548 (patch) | |
| tree | ddcf7964200a326a274a5710affd6496d3363f4a /scripts/generate_rust_analyzer.py | |
| parent | dt-bindings: clock: versaclock3: Add description for #clock-cells property (diff) | |
| download | linux-rng-576418e3417267e93ffee09c46f56434108c4548.tar.xz linux-rng-576418e3417267e93ffee09c46f56434108c4548.zip | |
clk: vc3: Fix 64 by 64 division
Fix the below cocci warnings by replacing do_div()->div64_ul() and
bound the result with a max value of U16_MAX.
cocci warnings:
drivers/clk/clk-versaclock3.c:404:2-8: WARNING: do_div() does a
64-by-32 division, please consider using div64_ul instead.
Reported-by: Julia Lawall <julia.lawall@inria.fr>
Closes: https://lore.kernel.org/r/202307270841.yr5HxYIl-lkp@intel.com/
Fixes: 6e9aff555db7 ("clk: Add support for versa3 clock driver")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20230824104812.147775-3-biju.das.jz@bp.renesas.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions