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author | 2023-10-31 14:09:19 -0700 | |
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committer | 2023-10-31 14:10:04 -0700 | |
commit | 5d09c63f11f083707b60c8ea0bb420651c47740f (patch) | |
tree | d7709fb9c23eccf9a3b00bbf1bd3489e04afdf6a /scripts/generate_rust_analyzer.py | |
parent | cxl/hdm: Fix && vs || bug (diff) | |
download | linux-rng-5d09c63f11f083707b60c8ea0bb420651c47740f.tar.xz linux-rng-5d09c63f11f083707b60c8ea0bb420651c47740f.zip |
cxl/hdm: Remove broken error path
Dan reports that cxl_decoder_commit() potentially leaks a hold of
cxl_dpa_rwsem. The potential error case is a "should not" happen
scenario, turn it into a "can not" happen scenario by adding the error
check to cxl_port_setup_targets() where other setting validation occurs.
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: http://lore.kernel.org/r/63295673-5d63-4919-b851-3b06d48734c0@moroto.mountain
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Fixes: 176baefb2eb5 ("cxl/hdm: Commit decoder state to hardware")
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions