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author | 2023-10-10 16:35:28 +0300 | |
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committer | 2023-10-12 17:30:54 -0700 | |
commit | 790437bbe0ef7e5cb5d091dd711c0d61d03945a5 (patch) | |
tree | 5c0feed518494c724e4ec58b3f26717d327570a2 /scripts/generate_rust_analyzer.py | |
parent | clk: Sanitize possible_parent_show to Handle Return Value of of_clk_get_parent_name (diff) | |
download | linux-rng-790437bbe0ef7e5cb5d091dd711c0d61d03945a5.tar.xz linux-rng-790437bbe0ef7e5cb5d091dd711c0d61d03945a5.zip |
clk: stm32: Fix a signedness issue in clk_stm32_composite_determine_rate()
The divider_ro_round_rate() function could potentially return -EINVAL on
error but the error handling doesn't work because "rate" is unsigned.
It should be a type long.
Fixes: 06ed0fc0fbac ("clk: stm32: composite: Switch to determine_rate")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/d9a78453-9b40-48c1-830e-00751ba3ecb8@kili.mountain
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions