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| author |   Dan Williams <dan.j.williams@intel.com> | 2023-10-31 10:59:00 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-10-31 10:59:00 -0700 |
| commit | 7f946e6d830fbdf411cd0641314edf11831efc88 (patch) | |
| tree | 4e3cfe2157e52e0d5aba6c548cd643f297a393c7 /scripts/generate_rust_analyzer.py | |
| parent | tools/testing/cxl: Slow down the mock firmware transfer (diff) | |
| parent | cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for devm (diff) | |
| download | linux-rng-7f946e6d830fbdf411cd0641314edf11831efc88.tar.xz linux-rng-7f946e6d830fbdf411cd0641314edf11831efc88.zip | |
Merge branch 'for-6.7/cxl-rch-eh' into cxl/next
Restricted CXL Host (RCH) Error Handling undoes the topology munging of
CXL 1.1 to enabled some AER recovery, and lands some base infrastructure
for handling Root-Complex-Event-Collectors (RCECs) with CXL. Include
this long running series finally for v6.7.
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions