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| author |   Sherry Sun <sherry.sun@nxp.com> | 2023-03-23 13:44:15 +0800 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-03-29 10:59:29 +0200 |
| commit | 9425914f3de6febbd6250395f56c8279676d9c3c (patch) | |
| tree | 3e22453b785c4f13e83e416dbbea5dbea0284799 /scripts/generate_rust_analyzer.py | |
| parent | serial: 8250: Prevent starting up DMA Rx on THRI interrupt (diff) | |
| download | linux-rng-9425914f3de6febbd6250395f56c8279676d9c3c.tar.xz linux-rng-9425914f3de6febbd6250395f56c8279676d9c3c.zip | |
tty: serial: fsl_lpuart: avoid checking for transfer complete when UARTCTRL_SBK is asserted in lpuart32_tx_empty
According to LPUART RM, Transmission Complete Flag becomes 0 if queuing
a break character by writing 1 to CTRL[SBK], so here need to avoid
checking for transmission complete when UARTCTRL_SBK is asserted,
otherwise the lpuart32_tx_empty may never get TIOCSER_TEMT.
Commit 2411fd94ceaa("tty: serial: fsl_lpuart: skip waiting for
transmission complete when UARTCTRL_SBK is asserted") only fix it in
lpuart32_set_termios(), here also fix it in lpuart32_tx_empty().
Fixes: 380c966c093e ("tty: serial: fsl_lpuart: add 32-bit register interface support")
Cc: stable <stable@kernel.org>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20230323054415.20363-1-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions