diff options
author | 2020-07-10 16:24:30 -0400 | |
---|---|---|
committer | 2023-04-26 22:51:04 -0400 | |
commit | 9675b3ba99ec79273d94afa09e9b69e2b8c0d238 (patch) | |
tree | 0d832e97bafbae4a8f552e6211f5dc475895dd19 /scripts/generate_rust_analyzer.py | |
parent | drm/amd/display: Isolate remaining FPU code in DCN32 (diff) | |
download | linux-rng-9675b3ba99ec79273d94afa09e9b69e2b8c0d238.tar.xz linux-rng-9675b3ba99ec79273d94afa09e9b69e2b8c0d238.zip |
drm/amd/display: Set min_width and min_height capability for DCN30
Add min_width, min_height fields to dc_plane_cap structure. Set values
to 16x16 for discrete ASICs, and 64x64 for others.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Igor Kravchenko <Igor.Kravchenko@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions