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| author |   Kanak Shilledar <kanakshilledar@gmail.com> | 2024-06-15 07:45:03 +0530 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2024-06-24 13:26:55 -0700 |
| commit | 9ff141042a6204ca69c2adcd0e35705fa2554950 (patch) | |
| tree | 4e93d9b13ce58c06d3b6fc1b0407e19ed9106dc4 /scripts/generate_rust_analyzer.py | |
| parent | Linux 6.10-rc1 (diff) | |
| download | linux-rng-9ff141042a6204ca69c2adcd0e35705fa2554950.tar.xz linux-rng-9ff141042a6204ca69c2adcd0e35705fa2554950.zip | |
dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschema
Convert the RISC-V Hart-Level Interrupt Controller (HLIC) to newer
DT schema, Created DT schema based on the .txt file which had
`compatible`, `#interrupt-cells` and `interrupt-controller` as
required properties.
Changes made with respect to original file:
- Changed the example to just use interrupt-controller instead of
using the whole cpu block
- Changed the example compatible string.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com>
Link: https://lore.kernel.org/r/20240615021507.122035-2-kanakshilledar@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions