aboutsummaryrefslogtreecommitdiffstats
path: root/scripts/generate_rust_analyzer.py
diff options
context:
space:
mode:
authorLucas Stach <l.stach@pengutronix.de>2022-12-31 13:40:25 +0800
committerShawn Guo <shawnguo@kernel.org>2022-12-31 13:40:25 +0800
commitb814eda949c324791580003303aa608761cfde3f (patch)
treedf797e77f4fe19ecb0ce80c670f0defedaa8ef6c /scripts/generate_rust_analyzer.py
parentLinux 6.2-rc1 (diff)
downloadlinux-rng-b814eda949c324791580003303aa608761cfde3f.tar.xz
linux-rng-b814eda949c324791580003303aa608761cfde3f.zip
soc: imx: imx8mp-blk-ctrl: enable global pixclk with HDMI_TX_PHY PD
NXP internal information shows that the PHY refclk is gated by the GLOBAL_TX_PIX_CLK_EN bit, so to allow the PHY PLL to lock without the LCDIF being already active, tie this bit to the HDMI_TX_PHY power domain. Fixes: e3442022f543 ("soc: imx: add i.MX8MP HDMI blk-ctrl") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions