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| author |   Dan Williams <dan.j.williams@intel.com> | 2023-02-10 18:11:01 -0800 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-10 18:11:01 -0800 |
| commit | b8b9ffced017528bcdd262730ab10bc5084c3bb4 (patch) | |
| tree | 1edb4782acb2d6704f3847181a480f375214a40f /scripts/generate_rust_analyzer.py | |
| parent | Merge branch 'for-6.3/cxl' into cxl/next (diff) | |
| parent | cxl/dax: Create dax devices for CXL RAM regions (diff) | |
| download | linux-rng-b8b9ffced017528bcdd262730ab10bc5084c3bb4.tar.xz linux-rng-b8b9ffced017528bcdd262730ab10bc5084c3bb4.zip | |
Merge branch 'for-6.3/cxl-ram-region' into cxl/next
Include the support for enumerating and provisioning ram regions for
v6.3. This also include a default policy change for ram / volatile
device-dax instances to assign them to the dax_kmem driver by default.
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions