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author | 2023-03-17 10:43:44 -0500 | |
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committer | 2023-04-18 17:04:13 +0200 | |
commit | cf15079c6b6163c15254437d862351e5b438be8b (patch) | |
tree | 0bf58293411163473c4b71ee7089872b6ff53a03 /scripts/generate_rust_analyzer.py | |
parent | soc: fsl: Use of_property_present() for testing DT property presence (diff) | |
download | linux-rng-cf15079c6b6163c15254437d862351e5b438be8b.tar.xz linux-rng-cf15079c6b6163c15254437d862351e5b438be8b.zip |
ARM: mv78xx0: adjust init logic for ts-wxl to reflect single core dev
Original code was largely copy-pasted from the reference board code, adjust pcie initialiazation to reflect the TS-WXL using the single-core variant of this SoC.
Correct pcie_port_size to be a power of 2 as required.
Signed-off-by: Jeremy J. Peper <jeremy@jeremypeper.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions