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| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-08-20 17:20:20 +0300 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2023-08-22 19:33:37 +0530 |
| commit | cfe0d203813420e643db08264679982a31fea95c (patch) | |
| tree | 3cd7f7eda84092a87e4660abf48525f46737ff1d /scripts/generate_rust_analyzer.py | |
| parent | dt-bindings: phy: qcom,qmp-pcie: describe SM8150 PCIe PHYs (diff) | |
| download | linux-rng-cfe0d203813420e643db08264679982a31fea95c.tar.xz linux-rng-cfe0d203813420e643db08264679982a31fea95c.zip | |
phy: qcom-qmp-pcie: drop ln_shrd from v5_20 config
There is no shared lane config for v5.20 PHYs, it is only present on
SM8550 gen4x2.
Fixes: a05b6d5135ec ("phy: qcom-qmp-pcie: add support for sa8775p")
Cc: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230820142035.89903-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions