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| author |   Doug Brown <doug@schmorgal.com> | 2022-06-12 12:29:33 -0700 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2022-09-30 13:34:06 -0700 |
| commit | d4161f7e7358eb3f20e6b82fa2ace19712ea5e6e (patch) | |
| tree | 8f8b23b935588fb97f1435c518b51de808597bd2 /scripts/generate_rust_analyzer.py | |
| parent | clk: mmp: pxa168: add muxes for more peripherals (diff) | |
| download | linux-rng-d4161f7e7358eb3f20e6b82fa2ace19712ea5e6e.tar.xz linux-rng-d4161f7e7358eb3f20e6b82fa2ace19712ea5e6e.zip | |
clk: mmp: pxa168: fix GPIO clock enable bits
According to the datasheet, only bit 0 of APBC_GPIO should be controlled
for the clock enable. Bit 1 is marked as reserved (always write 0).
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-9-doug@schmorgal.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions