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| author |   Xingyu Wu <xingyu.wu@starfivetech.com> | 2023-07-13 19:38:59 +0800 |
|---|---|---|
| committer |   Conor Dooley <conor.dooley@microchip.com> | 2023-07-19 18:08:05 +0100 |
| commit | dae5448a327edef952faaf31bb3aedb0597ba62a (patch) | |
| tree | 7fda5cc2ccc84600f80772764b6ead13a63b5725 /scripts/generate_rust_analyzer.py | |
| parent | clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver (diff) | |
| download | linux-rng-dae5448a327edef952faaf31bb3aedb0597ba62a.tar.xz linux-rng-dae5448a327edef952faaf31bb3aedb0597ba62a.zip | |
clk: starfive: Add StarFive JH7110 Video-Output clock driver
Add driver for the StarFive JH7110 Video-Output clock controller.
And these clock controllers should power on and enable the clocks from
SYSCRG first before registering.
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions