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| author |   Jarkko Nikula <jarkko.nikula@linux.intel.com> | 2025-04-09 17:03:57 +0300 |
|---|---|---|
| committer |   Alexandre Belloni <alexandre.belloni@bootlin.com> | 2025-05-15 11:41:13 +0200 |
| commit | eeeec6c5475e914157feab00bdcaed79132e47a2 (patch) | |
| tree | d888af31b0dc8cfbd14ce884e04842e525146a78 /scripts/generate_rust_analyzer.py | |
| parent | Linux 6.15-rc1 (diff) | |
| download | linux-rng-eeeec6c5475e914157feab00bdcaed79132e47a2.tar.xz linux-rng-eeeec6c5475e914157feab00bdcaed79132e47a2.zip | |
i3c: mipi-i3c-hci: Allow only relevant INTR_STATUS bit updates
Since MIPI I3C HCI specification version v0.8 INTR_STATUS bits 9:0 are
reserved. Version v0.5 has bits 9 and 5:0 in use but not handled by the
current driver code and not needed in DMA transfers.
PIO transfers with v0.5 would require changes to both
core.c: i3c_hci_irq_handler() and pio.c: hci_pio_irq_handler() though.
For these reasons don't enable signal updates from INTR_STATUS bits 9:0.
It allow to get rid of "unexpected INTR_STATUS" error messages on old
v0.5 IP version and is a no-op for later versions starting from v0.8.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20250409140401.299251-1-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions