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| author |   Ard Biesheuvel <ardb@kernel.org> | 2024-09-12 12:46:31 +0200 |
|---|---|---|
| committer |   Andi Shyti <andi.shyti@kernel.org> | 2024-09-24 16:23:26 +0200 |
| commit | f2990f8630531a99cad4dc5c44cb2a11ded42492 (patch) | |
| tree | 0de5f505907d582c2fb885117918add06af9ea08 /scripts/generate_rust_analyzer.py | |
| parent | i2c: designware: fix controller is holding SCL low while ENABLE bit is disabled (diff) | |
| download | linux-rng-f2990f8630531a99cad4dc5c44cb2a11ded42492.tar.xz linux-rng-f2990f8630531a99cad4dc5c44cb2a11ded42492.zip | |
i2c: synquacer: Deal with optional PCLK correctly
ACPI boot does not provide clocks and regulators, but instead, provides
the PCLK rate directly, and enables the clock in firmware. So deal
gracefully with this.
Fixes: 55750148e559 ("i2c: synquacer: Fix an error handling path in synquacer_i2c_probe()")
Cc: stable@vger.kernel.org # v6.10+
Cc: Andi Shyti <andi.shyti@kernel.org>
Cc: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions