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author | 2025-04-23 15:34:21 +0100 | |
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committer | 2025-05-14 15:30:40 +0100 | |
commit | 7de873201c44bff5b42f2e560098d463843b8a4c (patch) | |
tree | 2f756768a7f19361419eb0668e74ba577c5832b9 /scripts/lib/kdoc/kdoc_output.py | |
parent | dmaengine: sh: rz-dmac: Allow for multiple DMACs (diff) | |
download | linux-rng-7de873201c44bff5b42f2e560098d463843b8a4c.tar.xz linux-rng-7de873201c44bff5b42f2e560098d463843b8a4c.zip |
dmaengine: sh: rz-dmac: Add RZ/V2H(P) support
The DMAC IP found on the Renesas RZ/V2H(P) family of SoCs is
similar to the version found on the Renesas RZ/G2L family of
SoCs, but there are some differences:
* It only uses one register area
* It only uses one clock
* It only uses one reset
* Instead of using MID/IRD it uses REQ No
* It is connected to the Interrupt Control Unit (ICU)
* On the RZ/G2L there is only 1 DMAC, on the RZ/V2H(P) there are 5
Add specific support for the Renesas RZ/V2H(P) family of SoC by
tackling the aforementioned differences.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250423143422.3747702-6-fabrizio.castro.jz@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'scripts/lib/kdoc/kdoc_output.py')
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