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| author | 2025-09-24 20:08:52 +0000 | |
|---|---|---|
| committer | 2025-10-30 17:47:49 +0100 | |
| commit | 92ad6505a4b5e28afcc8cf5f4dd3fd137e58026b (patch) | |
| tree | afcda7e4adc0f2c335145f4df1fed7312b93e153 /tools/arch/alpha/include/uapi/git:/ssh:/git@git.zx2c4.com | |
| parent | x86/boot: Move boot_*msr helpers to asm/shared/msr.h (diff) | |
x86/sev: Include XSS value in GHCB CPUID request
When a guest issues a CPUID instruction for Fn0000000D_x01, the hypervisor may
be intercepting the CPUID instruction and need to access the guest XSS value.
For SEV-ES, the XSS value is encrypted and needs to be included in the GHCB to
be visible to the hypervisor.
Signed-off-by: John Allen <john.allen@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://patch.msgid.link/all/20250924200852.4452-3-john.allen@amd.com/
Diffstat (limited to 'tools/arch/alpha/include/uapi/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions
