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author | 2025-03-13 20:07:13 -0400 | |
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committer | 2025-03-26 17:42:48 -0400 | |
commit | 0389f2a3a23c9a2d4cf58d2ab0d3b283f19e8630 (patch) | |
tree | 60afb4a98edf97d8ab50ca7be1bc52c9d57a1fdb /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/amd/display: Increase vblank offdelay for PSR panels (diff) | |
download | linux-rng-0389f2a3a23c9a2d4cf58d2ab0d3b283f19e8630.tar.xz linux-rng-0389f2a3a23c9a2d4cf58d2ab0d3b283f19e8630.zip |
Revert "drm/amd/display: dml2 soc dscclk use DPM table clk setting"
[why]
this dscclk use DCN defined per DPM level will cause a DCFCLK increase.
needs to follow up.
This reverts commit 15b959534a39530a21d378190557cc8d1eab7b09
Reviewed-by: Yihan Zhu <yihan.zhu@amd.com>
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions