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author | 2018-04-25 22:04:18 -0400 | |
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committer | 2018-05-03 13:55:47 +0200 | |
commit | 1b86883ccb8d5d9506529d42dbe1a5257cb30b18 (patch) | |
tree | 62fc0a681b462a5703dabe5ad8d6acb8e7e2745a /tools/perf/scripts/python/export-to-postgresql.py | |
parent | x86/bugs: Concentrate bug reporting into a separate function (diff) | |
download | linux-rng-1b86883ccb8d5d9506529d42dbe1a5257cb30b18.tar.xz linux-rng-1b86883ccb8d5d9506529d42dbe1a5257cb30b18.zip |
x86/bugs: Read SPEC_CTRL MSR during boot and re-use reserved bits
The 336996-Speculative-Execution-Side-Channel-Mitigations.pdf refers to all
the other bits as reserved. The Intel SDM glossary defines reserved as
implementation specific - aka unknown.
As such at bootup this must be taken it into account and proper masking for
the bits in use applied.
A copy of this document is available at
https://bugzilla.kernel.org/show_bug.cgi?id=199511
[ tglx: Made x86_spec_ctrl_base __ro_after_init ]
Suggested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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