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| author |   Arnd Bergmann <arnd@arndb.de> | 2020-07-17 18:01:41 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-07-17 18:01:41 +0200 |
| commit | 2648298a06ba7e902c4489a15c0db26032813c7b (patch) | |
| tree | 0c2592f9ae0cd693136ea4cd3fb4f6890d498532 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge tag 'renesas-fixes-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes (diff) | |
| parent | arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema (diff) | |
| download | linux-rng-2648298a06ba7e902c4489a15c0db26032813c7b.tar.xz linux-rng-2648298a06ba7e902c4489a15c0db26032813c7b.zip | |
Merge tag 'socfpga_fixes_for_v5.8_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes
arm/arm64: dts: socfpga: fixes for v5.8
- Add status = "okay" in QSPI
- Increase QSPI size in reg property
- Fix dtschema for SoCFPGA platforms
* tag 'socfpga_fixes_for_v5.8_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
arm64: dts: stratix10: increase QSPI reg address in nand dts file
arm64: dts: stratix10: add status to qspi dts node
arm64: dts: agilex: add status to qspi dts node
Link: https://lore.kernel.org/r/20200717155758.18233-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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