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| author |   Arnd Bergmann <arnd@arndb.de> | 2024-07-08 21:33:23 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-07-08 21:33:23 +0200 |
| commit | 43528789a0b9df73b318e9e8cbab3138d0187f2c (patch) | |
| tree | 6a4c0b37a7fff08fc5fe4af682c5e308b89f1073 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge tag 'qcom-arm64-defconfig-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig (diff) | |
| parent | riscv: defconfig: Enable StarFive JH7110 drivers (diff) | |
| download | linux-rng-43528789a0b9df73b318e9e8cbab3138d0187f2c.tar.xz linux-rng-43528789a0b9df73b318e9e8cbab3138d0187f2c.zip | |
Merge tag 'riscv-config-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/defconfig
RISC-V config update for v6.11
StarFive:
Enable most of the options needed for the jh7100 based boards to be
properly testable with defconfig.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-config-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: defconfig: Enable StarFive JH7110 drivers
Link: https://lore.kernel.org/r/20240707-unused-outflank-aa127ccb2cfe@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions