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| author |   Krishna Yarlagadda <kyarlagadda@nvidia.com> | 2019-09-04 10:13:02 +0530 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-05 10:00:04 +0200 |
| commit | 53d0a062cb771d62cd205d9e2845fe26c9989142 (patch) | |
| tree | b7bed9c94b57ef3ba9fac6d5ae72059939299026 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | serial: tegra: check for FIFO mode enabled status (diff) | |
| download | linux-rng-53d0a062cb771d62cd205d9e2845fe26c9989142.tar.xz linux-rng-53d0a062cb771d62cd205d9e2845fe26c9989142.zip | |
serial: tegra: set maximum num of uart ports to 8
Set maximum number of UART ports to 8 as older chips have 5 ports and
Tergra186 and later chips will have 8 ports. Add this info to chip
data. Read device tree compatible of this driver and register uart
driver with max ports of matching chip data.
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/1567572187-29820-8-git-send-email-kyarlagadda@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions