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authorArnd Bergmann <arnd@arndb.de>2024-07-09 15:36:08 +0200
committerArnd Bergmann <arnd@arndb.de>2024-07-09 15:36:09 +0200
commit782b726201471326575f386128fa03db90c83ad8 (patch)
treea8fa124ae6d0b12a4ca7d1eb3ebc7fca35ba7418 /tools/perf/scripts/python/export-to-postgresql.py
parentplatform: cznic: turris-omnia-mcu: Depend on WATCHDOG (diff)
parentdrivers: soc: xilinx: check return status of get_api_version() (diff)
downloadlinux-rng-782b726201471326575f386128fa03db90c83ad8.tar.xz
linux-rng-782b726201471326575f386128fa03db90c83ad8.zip
Merge tag 'zynqmp-soc2-for-6.11' of https://github.com/Xilinx/linux-xlnx into soc/drivers
arm64: Xilinx SoC changes for 6.11 Timer - Fix u32 overflow issue in 32-bit width PWM mode. Event manager: - rename cpu_number1 to dummy_cpu_number Power: - Add cb event for subsystem restart - check return status of get_api_version() Firmware: - Move FIRMWARE_VERSION_MASK to xlnx-zynqmp.h * tag 'zynqmp-soc2-for-6.11' of https://github.com/Xilinx/linux-xlnx: drivers: soc: xilinx: check return status of get_api_version() firmware: xilinx: Move FIRMWARE_VERSION_MASK to xlnx-zynqmp.h soc: xilinx: Add cb event for subsystem restart soc: xilinx: rename cpu_number1 to dummy_cpu_number pwm: xilinx: Fix u32 overflow issue in 32-bit width PWM mode. Link: https://lore.kernel.org/r/CAHTX3dKMtqgNpkEvrw0p2w+SPN83Ai1_kzhefUGOO5rMkPaH_w@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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