diff options
author | 2017-03-23 16:08:46 -0700 | |
---|---|---|
committer | 2017-03-23 16:08:46 -0700 | |
commit | 7f0b97d5bb4c1c99c38dd6770ad11f714ea42583 (patch) | |
tree | ef993e4555f983dc35e282b2b2d949a1ebd42a2a /tools/perf/scripts/python/export-to-postgresql.py | |
parent | clk: rockchip: Make uartpll a child of the gpll on rk3036 (diff) | |
parent | clk: sunxi-ng: fix recalc_rate formula of NKMP clocks (diff) | |
download | linux-rng-7f0b97d5bb4c1c99c38dd6770ad11f714ea42583.tar.xz linux-rng-7f0b97d5bb4c1c99c38dd6770ad11f714ea42583.zip |
Merge tag 'sunxi-clk-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-fixes
Pull Allwinner clock fixes from Maxime Ripard:
A few fixes for a bunch of clocks on a few SoCs. The most important one is
probably one that fixes the NKMP clock frequency calculation and could end
up with clocking the CPU frequency to out of bounds rates.
* tag 'sunxi-clk-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi-ng: fix recalc_rate formula of NKMP clocks
clk: sunxi-ng: Fix div/mult settings for osc12M on A64
clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock
clk: sunxi: ccu-sun5i needs nkmp
clk: sunxi-ng: mp: Adjust parent rate for pre-dividers
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions