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| author |   Sean Wang <sean.wang@mediatek.com> | 2018-03-01 11:27:51 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2018-03-19 13:25:30 -0700 |
| commit | 89cd7aec21af26fd0c117bfc4bfc781724f201de (patch) | |
| tree | 2e3eea097df5ae00cd2a1e4bd14252702dcf1673 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4 (diff) | |
| download | linux-rng-89cd7aec21af26fd0c117bfc4bfc781724f201de.tar.xz linux-rng-89cd7aec21af26fd0c117bfc4bfc781724f201de.zip | |
clk: mediatek: fix PWM clock source by adding a fixed-factor clock
The clock for which all PWM devices on MT7623 or MT2701 actually depending
on has to be divided by four from its parent clock axi_sel in the clock
path prior to PWM devices.
Consequently, adding a fixed-factor clock axisel_d4 as one-fourth of
clock axi_sel allows that PWM devices can have the correct resolution
calculation.
Cc: stable@vger.kernel.org
Fixes: e9862118272a ("clk: mediatek: Add MT2701 clock support")
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions