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| author |   Tony Lindgren <tony@atomide.com> | 2019-05-27 04:51:54 -0700 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2019-05-28 05:19:15 -0700 |
| commit | ae9ae12e9daa1e2139c3ff729d60f3c16d6e9b61 (patch) | |
| tree | be37e2afe465b1a005c367276d5318c56e51c24e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | bus: ti-sysc: Enable interconnect target module autoidle bit on enable (diff) | |
| download | linux-rng-ae9ae12e9daa1e2139c3ff729d60f3c16d6e9b61.tar.xz linux-rng-ae9ae12e9daa1e2139c3ff729d60f3c16d6e9b61.zip | |
bus: ti-sysc: Handle clockactivity for enable and disable
Modules with clockactivity need it configured during enable.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions