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| author |   Victor Lu <victorchengchi.lu@amd.com> | 2023-08-08 13:57:16 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-11-09 17:01:10 -0500 |
| commit | bc3c566071c8504f5d7c73a4171ead394f097639 (patch) | |
| tree | e721025135df1e264d7df959a2afbd406e5838bb /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amdgpu: Add flag to enable indirect RLCG access for gfx v9.4.3 (diff) | |
| download | linux-rng-bc3c566071c8504f5d7c73a4171ead394f097639.tar.xz linux-rng-bc3c566071c8504f5d7c73a4171ead394f097639.zip | |
drm/amdgpu: Add xcc param to SRIOV kiq write and WREG32_SOC15_IP_NO_KIQ (v4)
WREG32/RREG32_SOC15_IP_NO_KIQ and amdgpu_virt_kiq_reg_write_reg_wait
are not using the correct rlcg interface or mec engine, respectively.
Add xcc instance parameter to them.
v4: Use GET_INST and squash commit with:
"drm/amdgpu: Add xcc_inst param to amdgpu_virt_kiq_reg_write_reg_wait"
v3: xcc not needed for MMMHUB
v2: rebase
Signed-off-by: Victor Lu <victorchengchi.lu@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions