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| author |   Jayant Shekhar <jshekhar@codeaurora.org> | 2019-06-18 13:24:09 -0700 |
|---|---|---|
| committer |   Rob Clark <robdclark@chromium.org> | 2019-06-20 08:39:24 -0700 |
| commit | cb88482e2570f67a6f4e72569e5a18329d5536ab (patch) | |
| tree | bb8cb27a82a8f7f2952c056db3f2a2bfe744d4ac /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/msm/dsi: Add parentheses to quirks check in dsi_phy_hw_v3_0_lane_settings (diff) | |
| download | linux-rng-cb88482e2570f67a6f4e72569e5a18329d5536ab.tar.xz linux-rng-cb88482e2570f67a6f4e72569e5a18329d5536ab.zip | |
drm/msm/dpu: clean up references of DPU custom bus scaling
Since the upstream interconnect bus framework has landed
upstream, the existing references of custom bus scaling
needs to be cleaned up.
Changes in v2:
- Fixed build error due to partial clean up
Changes in v3:
- Condense multiple lines into a single line (Sean Paul)
Changes in v4-v7:
- None
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Sean Paul <sean@poorly.run>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions