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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-11-21 07:43:15 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-11-23 14:33:07 +0200 |
| commit | e0d5ce11ed0a21bb2bf328ad82fd261783c7ad88 (patch) | |
| tree | f471d93d230f527172d671d24851aedf24237112 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915: Check pipe active state in {planes,vrr}_{enabling,disabling}() (diff) | |
| download | linux-rng-e0d5ce11ed0a21bb2bf328ad82fd261783c7ad88.tar.xz linux-rng-e0d5ce11ed0a21bb2bf328ad82fd261783c7ad88.zip | |
drm/i915: Call intel_pre_plane_updates() also for pipes getting enabled
We used to call intel_pre_plane_updates() for any pipe going through
a modeset whether the pipe was previously enabled or not. This in
fact needed to apply all the necessary clock gating workarounds/etc.
Restore the correct behaviour.
Fixes: 39919997322f ("drm/i915: Disable all planes before modesetting any pipes")
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231121054324.9988-3-ville.syrjala@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions