diff options
| author | 2025-11-11 16:08:01 +0800 | |
|---|---|---|
| committer | 2025-11-11 13:48:13 +0100 | |
| commit | fd3ecda38fe0cb713d167b5477d25f6b350f0514 (patch) | |
| tree | db5665a1ae19d75ea7c41f01ddad151971e6beb0 /tools/testing/selftests/pidfd/git:/ssh:/git@git.zx2c4.com | |
| parent | EDAC/versalnet: Handle split messages for non-standard errors (diff) | |
| download | linux-rng-fd3ecda38fe0cb713d167b5477d25f6b350f0514.tar.xz linux-rng-fd3ecda38fe0cb713d167b5477d25f6b350f0514.zip | |
EDAC/altera: Handle OCRAM ECC enable after warm reset
The OCRAM ECC is always enabled either by the BootROM or by the Secure Device
Manager (SDM) during a power-on reset on SoCFPGA.
However, during a warm reset, the OCRAM content is retained to preserve data,
while the control and status registers are reset to their default values. As
a result, ECC must be explicitly re-enabled after a warm reset.
Fixes: 17e47dc6db4f ("EDAC/altera: Add Stratix10 OCRAM ECC support")
Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20251111080801.1279401-1-niravkumarlaxmidas.rabara@altera.com
Diffstat (limited to 'tools/testing/selftests/pidfd/git:/ssh:/git@git.zx2c4.com')
0 files changed, 0 insertions, 0 deletions
