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-rw-r--r--Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml
index 824781cbdf34..27ae9938febc 100644
--- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml
@@ -33,6 +33,8 @@ properties:
- description: PCIE30 PHY3 pipe clock source
- description: USB3 PHY pipe clock source
+ '#power-domain-cells': false
+
'#interconnect-cells':
const: 1
@@ -60,6 +62,5 @@ examples:
<&usb3phy_0_cc_pipe_clk>;
#clock-cells = <1>;
#reset-cells = <1>;
- #power-domain-cells = <1>;
};
...