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-rw-r--r--Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
index 378e9cc5fac2..f3bd0be3b279 100644
--- a/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
+++ b/Documentation/devicetree/bindings/soc/ti/ti,j721e-system-controller.yaml
@@ -26,6 +26,7 @@ properties:
compatible:
items:
- enum:
+ - ti,am654-system-controller
- ti,j7200-system-controller
- ti,j721e-system-controller
- ti,j721s2-system-controller
@@ -68,6 +69,23 @@ patternProperties:
description:
The node corresponding to SoC chip identification.
+ "^pcie-ctrl@[0-9a-f]+$":
+ type: object
+ description:
+ The node corresponding to PCIe control register.
+
+ "^clock@[0-9a-f]+$":
+ type: object
+ $ref: /schemas/soc/ti/ti,am654-serdes-ctrl.yaml#
+ description:
+ This is the Serdes Control region.
+
+ "^dss-oldi-io-ctrl@[0-9a-f]+$":
+ type: object
+ $ref: /schemas/mfd/syscon.yaml#
+ description:
+ This is the DSS OLDI CTRL region.
+
required:
- compatible
- reg
@@ -110,5 +128,10 @@ examples:
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
+
+ pcie0_ctrl: pcie-ctrl@4070 {
+ compatible = "ti,j784s4-pcie-ctrl", "syscon";
+ reg = <0x4070 0x4>;
+ };
};
...