| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2014-08-08 | arch/x86: replace strict_strto calls |   Daniel Walter | 1 | -2/+2 |
| 2014-07-23 | x86, cpu: Fix cache topology for early P4-SMT |   Peter Zijlstra | 1 | -0/+12 |
| 2014-03-20 | x86, intel, cacheinfo: Fix CPU hotplug callback registration |   Srivatsa S. Bhat | 1 | -5/+8 |
| 2013-10-14 | treewide: Fix common typo in "identify" |   Maxime Jayat | 1 | -1/+1 |
| 2013-07-14 | x86: delete __cpuinit usage from all x86 files |   Paul Gortmaker | 1 | -28/+27 |
| 2013-06-20 | x86/intel/cacheinfo: Shut up last long-standing warning |   Borislav Petkov | 1 | -27/+25 |
| 2013-02-19 | Merge branch 'x86-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip |   Linus Torvalds | 1 | -1/+1 |
| 2013-02-04 | x86/intel/cacheinfo: Shut up annoying warning | Borislav Petkov | 1 | -4/+3 |
| 2013-01-24 | x86: Convert a few mistaken __cpuinit annotations to __init |   Jan Beulich | 1 | -1/+1 |
| 2012-11-13 | x86, cacheinfo: Base cache sharing info on CPUID 0x8000001d on AMD |   Andreas Herrmann | 1 | -14/+27 |
| 2012-11-13 | x86, cacheinfo: Make use of CPUID 0x8000001d for cache information on AMD | Andreas Herrmann | 1 | -1/+5 |
| 2012-11-13 | x86, cacheinfo: Determine number of cache leafs using CPUID 0x8000001d on AMD | Andreas Herrmann | 1 | -5/+23 |
| 2012-10-04 | x86/cache_info: Use ARRAY_SIZE() in amd_l3_attrs() |   Dan Carpenter | 1 | -1/+1 |
| 2012-05-07 | x86/cache_info: Fix setup of l2/l3 ids |   Shai Fultheim | 1 | -2/+2 |
| 2012-04-19 | x86, intel_cacheinfo: Fix error return code in amd_set_l3_disable_slot() | Srivatsa S. Bhat | 1 | -4/+4 |
| 2012-02-09 | x86/amd: Fix L1i and L2 cache sharing information for AMD family 15h processors | Andreas Herrmann | 1 | -8/+36 |
| 2011-12-21 | cpu: convert 'cpu' and 'machinecheck' sysdev_class to a regular subsystem |   Kay Sievers | 1 | -13/+12 |
| 2011-09-12 | x86: cache_info: Update calculation of AMD L3 cache indices |   Frank Arnold | 1 | -0/+6 |
| 2011-09-12 | x86: cache_info: Kill the atomic allocation in amd_init_l3_cache() |   Thomas Gleixner | 1 | -48/+26 |
| 2011-09-12 | x86: cache_info: Kill the moronic shadow struct | Thomas Gleixner | 1 | -38/+22 |
| 2011-09-12 | x86: cache_info: Remove bogus free of amd_l3_cache data | Thomas Gleixner | 1 | -1/+0 |
| 2011-05-16 | x86, AMD, cacheinfo: Fix L3 cache index disable checks | Frank Arnold | 1 | -15/+4 |
| 2011-05-16 | x86, AMD, cacheinfo: Fix fallout caused by max3 conversion |   Borislav Petkov | 1 | -1/+0 |
| 2011-03-15 | Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip | Linus Torvalds | 1 | -15/+61 |
| 2011-02-07 | x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs |   Hans Rosenfeld | 1 | -15/+61 |
| 2011-01-26 | x86: Move llc_shared_map out of cpu_info |   Yinghai Lu | 1 | -2/+2 |
| 2011-01-20 | x86: Update CPU cache attributes table descriptors |   Dave Jones | 1 | -0/+3 |
| 2011-01-07 | Merge branch 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu | Linus Torvalds | 1 | -2/+2 |
| 2010-12-30 | x86: Replace uses of current_cpu_data with this_cpu ops |   Tejun Heo | 1 | -2/+2 |
| 2010-11-18 | x86, cacheinfo: Cleanup L3 cache index disable support | Hans Rosenfeld | 1 | -84/+63 |
| 2010-11-18 | x86, amd-nb: Cleanup AMD northbridge caching code | Hans Rosenfeld | 1 | -3/+3 |
| 2010-11-18 | x86, amd-nb: Complete the rename of AMD NB and related code | Hans Rosenfeld | 1 | -3/+3 |
| 2010-10-26 | replace nested max/min macros with {max,min}3 macro |   Hagen Paul Pfeifer | 1 | -0/+1 |
| 2010-09-20 | x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NB | Andreas Herrmann | 1 | -5/+5 |
| 2010-09-17 | x86, k8-gart: Decouple handling of garts and northbridges | Andreas Herrmann | 1 | -2/+2 |
| 2010-09-17 | x86, cacheinfo: Fix dependency of AMD L3 CID | Andreas Herrmann | 1 | -4/+4 |
| 2010-06-09 | x86, cacheinfo: Carve out L3 cache slot accessors |   Borislav Petkov | 1 | -26/+82 |
| 2010-04-22 | x86, cacheinfo: Disable index in all four subcaches | Borislav Petkov | 1 | -17/+43 |
| 2010-04-22 | x86, cacheinfo: Make L3 cache info per node | Borislav Petkov | 1 | -14/+45 |
| 2010-04-22 | x86, cacheinfo: Reorganize AMD L3 cache structure | Borislav Petkov | 1 | -21/+32 |
| 2010-04-22 | x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments | Frank Arnold | 1 | -0/+4 |
| 2010-04-22 | x86, cacheinfo: Unify AMD L3 cache index disable checking | Borislav Petkov | 1 | -7/+10 |
| 2010-03-07 | Driver core: Constify struct sysfs_ops in struct kobj_type |   Emese Revfy | 1 | -1/+1 |
| 2010-02-28 | Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip | Linus Torvalds | 1 | -94/+156 |
| 2010-02-18 | x86, cacheinfo: Enable L3 CID only on AMD | Borislav Petkov | 1 | -88/+98 |
| 2010-02-18 | x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1 | Borislav Petkov | 1 | -3/+3 |
| 2010-01-22 | x86, cacheinfo: Calculate L3 indices | Borislav Petkov | 1 | -4/+31 |
| 2010-01-22 | x86, cacheinfo: Add cache index disable sysfs attrs only to L3 caches | Borislav Petkov | 1 | -9/+26 |
| 2010-01-22 | x86, cacheinfo: Fix disabling of L3 cache indices | Borislav Petkov | 1 | -13/+21 |
| 2010-01-13 | x86: Macroise x86 cache descriptors | Dave Jones | 1 | -41/+43 |
