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2025-11-21x86/mce: Handle AMD threshold interrupt stormsSmita Koralahalli3-0/+10
2025-11-21x86/mce: Do not clear bank's poll bit in mce_poll_banks on AMD SMCA systemsAvadhut Naik1-1/+2
2025-11-21x86/mce: Add support for physical address valid bitAvadhut Naik1-3/+13
2025-11-21x86/mce: Save and use APEI corrected threshold limitYazen Ghannam3-2/+31
2025-11-05x86/mce/amd: Define threshold restart function for banksYazen Ghannam1-18/+19
2025-11-05x86/mce/amd: Remove redundant reset_block()Yazen Ghannam1-21/+7
2025-11-05x86/mce/amd: Support SMCA Corrected Error InterruptYazen Ghannam1-0/+17
2025-11-05x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systemsYazen Ghannam1-68/+53
2025-11-05x86/mce: Unify AMD DFR handler with MCA PollingYazen Ghannam2-99/+43
2025-11-05x86/mce: Unify AMD THR handler with MCA PollingYazen Ghannam1-28/+23
2025-09-11x86/mce: Add a clear_bank() helperYazen Ghannam3-5/+18
2025-09-11x86/mce: Move machine_check_poll() status checks to helper functionsYazen Ghannam1-40/+48
2025-09-11x86/mce: Separate global and per-CPU quirksYazen Ghannam3-62/+65
2025-09-11x86/mce: Do 'UNKNOWN' vendor check earlyYazen Ghannam1-10/+8
2025-09-11x86/mce: Define BSP-only SMCA initYazen Ghannam3-0/+11
2025-09-11x86/mce: Define BSP-only initYazen Ghannam2-10/+21
2025-09-11x86/mce: Set CR4.MCE last during initYazen Ghannam1-2/+3
2025-09-05x86/mce: Remove __mcheck_cpu_init_early()Yazen Ghannam2-14/+4
2025-09-05x86/mce: Cleanup bank processing on initBorislav Petkov1-45/+18
2025-09-05x86/mce/amd: Put list_head in threshold_bankYazen Ghannam1-31/+12
2025-09-05x86/mce/amd: Remove smca_banks_mapYazen Ghannam1-41/+9
2025-09-05x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device()Yazen Ghannam2-12/+14
2025-09-05x86/mce/amd: Rename threshold restart functionYazen Ghannam1-6/+6
2025-06-28x86/mce: Make sure CMCI banks are cleared during shutdown on IntelJP Kobryn1-0/+1
2025-06-27x86/mce/amd: Fix threshold limit resetYazen Ghannam1-8/+7
2025-06-27x86/mce/amd: Add default names for MCA banks and blocksYazen Ghannam1-3/+10
2025-06-27x86/mce: Ensure user polling settings are honored when restarting timerYazen Ghannam1-6/+10
2025-06-26x86/mce: Don't remove sysfs if thresholding sysfs init failsYazen Ghannam1-7/+1
2025-05-13Merge branch 'x86/msr' into x86/core, to resolve conflictsIngo Molnar5-77/+78
2025-05-02x86/msr: Convert __rdmsr() uses to native_rdmsrq() usesXin Li (Intel)1-2/+2
2025-05-02x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() usesXin Li (Intel)1-1/+1
2025-05-02x86/msr: Add explicit includes of <asm/msr.h>Xin Li (Intel)1-0/+1
2025-05-02x86/msr: Rename DECLARE_ARGS() to EAX_EDX_DECLARE_ARGSIngo Molnar1-1/+1
2025-04-14x86/platform/amd: Move the <asm/amd_nb.h> header to <asm/amd/nb.h>Ingo Molnar1-1/+1
2025-04-10x86/msr: Rename 'mce_wrmsrl()' to 'mce_wrmsrq()'Ingo Molnar1-6/+6
2025-04-10x86/msr: Rename 'mce_rdmsrl()' to 'mce_rdmsrq()'Ingo Molnar2-17/+17
2025-04-10x86/msr: Rename 'rdmsrl_on_cpu()' to 'rdmsrq_on_cpu()'Ingo Molnar1-2/+2
2025-04-10x86/msr: Rename 'wrmsrl_safe()' to 'wrmsrq_safe()'Ingo Molnar2-3/+3
2025-04-10x86/msr: Rename 'rdmsrl_safe()' to 'rdmsrq_safe()'Ingo Molnar2-2/+2
2025-04-10x86/msr: Rename 'wrmsrl()' to 'wrmsrq()'Ingo Molnar4-23/+23
2025-04-10x86/msr: Rename 'rdmsrl()' to 'rdmsrq()'Ingo Molnar4-20/+20
2025-04-05treewide: Switch/rename to timer_delete[_sync]()Thomas Gleixner1-3/+3
2025-04-01Merge tag 'mm-stable-2025-03-30-16-52' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mmLinus Torvalds1-6/+5
2025-03-17x86/mce: use is_copy_from_user() to determine copy-from-user contextShuai Xue1-6/+5
2025-02-26x86/mce/inject: Remove call to mce_notify_irq()Nikolay Borisov2-23/+22
2025-01-03x86/mce/amd: Remove shared threshold bank plumbingYazen Ghannam1-101/+26
2024-12-31x86/mce: Remove the redundant mce_hygon_feature_init()Qiuxu Zhuo1-6/+2
2024-12-31x86/mce: Convert family/model mixed checks to VFM-based checksQiuxu Zhuo1-5/+8
2024-12-31x86/mce: Break up __mcheck_cpu_apply_quirks()Tony Luck1-76/+92
2024-12-30x86/mce: Make four functions return boolQiuxu Zhuo3-23/+22
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