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path: root/drivers/dpll/zl3073x/core.c
AgeCommit message (Expand)AuthorFilesLines
2026-08-18dpll: zl3073x: add channel ToD, phase step and TIE operationsIvan Vecera1-0/+13
2026-08-18dpll: zl3073x: scale poll interval proportionally to timeoutIvan Vecera1-2/+2
2026-08-05dpll: zl3073x: recognize the ZL30643 chip ID (0x0E3B)Vincent Jardin1-0/+1
2026-07-06dpll: zl3073x: add per-DPLL serialization lockIvan Vecera1-17/+2
2026-07-06dpll: zl3073x: use per-operation poll timeoutsIvan Vecera1-12/+17
2026-05-28Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski1-11/+8
2026-05-28dpll: zl3073x: make frequency monitor a per-device attributeIvan Vecera1-11/+8
2026-05-12dpll: zl3073x: report FFO as DPLL vs input reference offsetIvan Vecera1-45/+0
2026-04-12dpll: zl3073x: use FIELD_MODIFY() for clear-and-set patternsIvan Vecera1-2/+1
2026-04-03dpll: zl3073x: implement frequency monitoringIvan Vecera1-13/+75
2026-03-17dpll: zl3073x: add DPLL channel status fields to zl3073x_chanIvan Vecera1-0/+17
2026-03-17dpll: zl3073x: introduce zl3073x_chan for DPLL channel stateIvan Vecera1-0/+10
2026-03-17dpll: zl3073x: add zl3073x_ref_state_update helperIvan Vecera1-5/+4
2026-03-03dpll: zl3073x: add die temperature reporting for supported chipsIvan Vecera1-11/+11
2026-03-03dpll: zl3073x: detect DPLL channel count from chip ID at runtimeIvan Vecera1-84/+32
2026-02-25dpll: zl3073x: Remove redundant cleanup in devm_dpll_init()Felix Gu1-5/+1
2026-02-23dpll: zl3073x: fix REF_PHASE_OFFSET_COMP register width for some chip IDsIvan Vecera1-0/+1
2026-01-29dpll: expose fractional frequency offset in pptIvan Vecera1-2/+5
2025-11-17dpll: zl3073x: Cache reference monitor statusIvan Vecera1-0/+18
2025-11-17dpll: zl3073x: Split ref, out, and synth logic from coreIvan Vecera1-194/+0
2025-11-17dpll: zl3073x: Store raw register values instead of parsed stateIvan Vecera1-56/+25
2025-10-13dpll: zl3073x: Handle missing or corrupted flash configurationIvan Vecera1-0/+21
2025-09-29dpll: zl3073x: Allow to configure phase offset averaging factorIvan Vecera1-4/+34
2025-09-15dpll: zl3073x: Refactor DPLL initializationIvan Vecera1-74/+133
2025-09-15dpll: zl3073x: Add functions to access hardware registersIvan Vecera1-4/+151
2025-07-17dpll: zl3073x: Add support to get fractional frequency offsetIvan Vecera1-0/+67
2025-07-17dpll: zl3073x: Implement phase offset monitor featureIvan Vecera1-5/+23
2025-07-17dpll: zl3073x: Add support to get phase offset on connected input pinIvan Vecera1-0/+86
2025-07-09dpll: zl3073x: Register DPLL devices and pinsIvan Vecera1-0/+104
2025-07-09dpll: zl3073x: Read DPLL types and pin properties from system firmwareIvan Vecera1-0/+41
2025-07-09dpll: zl3073x: Fetch invariants during probeIvan Vecera1-0/+249
2025-07-09dpll: Add basic Microchip ZL3073x supportIvan Vecera1-0/+465
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