aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/include/asic_reg/dcn
AgeCommit message (Expand)AuthorFilesLines
2026-08-06drm/amd: Add DCN6 register headersAurabindo Pillai2-0/+74355
2026-06-03drm/amd: Add register header files for DCN42BMatthew Stewart2-0/+76928
2026-05-11drm/amd/display: Add FRL registers for DCN316Rodrigo Siqueira2-0/+657
2026-05-11drm/amd/display: Add FRL registers for DCN315Rodrigo Siqueira2-0/+659
2026-05-11drm/amd/display: Add FRL register for DCN303Rodrigo Siqueira2-0/+1052
2026-05-11drm/amd/display: Add FRL register for DCN302Rodrigo Siqueira2-0/+2019
2026-05-11drm/amd/display: Add the necessary FRL registers for DCN314Rodrigo Siqueira2-0/+652
2026-05-11drm/amd/display: Introduce FRL registers for DCN32Rodrigo Siqueira2-0/+653
2026-05-11drm/amd/display: Add FRL registers for DCN321Rodrigo Siqueira2-1/+671
2026-05-11drm/amd/display: Add required FRL registers for DCN31Rodrigo Siqueira2-0/+657
2026-05-11drm/amd/display: Add FRL registers for DCN30Rodrigo Siqueira2-0/+729
2026-03-23drm/amd/display: Update underflow detection for DCN42Roman Li1-0/+6
2026-03-11drm/amd/display: Sync dcn42 with DC 3.2.373Roman Li2-0/+11
2026-02-23drm/amd/display: Add dcn42 register headersRoman Li2-0/+85149
2025-05-28drm/amd/display: Add some missing register headers for DCN401Aurabindo Pillai2-0/+42
2025-02-12drm/amd/display: Add dcn36 register header filesWayne Lin2-0/+77425
2024-12-10drm/amdgpu: rename register headers to dcn_2_0_1Leo Li2-4/+4
2024-11-04drm/amd/display: Add a missing DCN401 reg definitionAurabindo Pillai1-0/+2
2024-06-27drm/amd: Add some missing register definitionsAurabindo Pillai1-0/+18
2024-06-27drm/amd: Add reg definitions for DCN401 DCCAurabindo Pillai1-0/+110
2024-05-29drm/amd/display: Add missing registers for DCN401Rodrigo Siqueira1-1/+50
2024-04-26drm/amd: Add DCN401 related register definitionsAurabindo Pillai9-0/+162669
2024-04-26drm/amd/display: Add some missing HDMI registers for DCN3xRodrigo Siqueira4-0/+23
2024-04-09drm/amd/display: Add missing registersRodrigo Siqueira6-0/+136
2024-04-09drm/amd/display: Add some missing debug registersRodrigo Siqueira7-0/+81
2024-03-20drm/amd/display: Add missing registers and offsetRodrigo Siqueira2-1/+52
2024-03-04drm/amd: add register headers for DCN351Hamza Mahfooz2-0/+68723
2024-01-29drm/amd/include: Add missing registers/mask for DCN316 and 350Rodrigo Siqueira4-0/+103
2023-11-17drm/amd/display: Enable DCN clock gating for DCN35Daniel Miess1-0/+8
2023-08-30drm/amd/display: Add dcn35 register header filesQingqing Zhuo2-0/+68667
2023-08-15drm/amd/display: Add some missing register definitionsAurabindo Pillai4-1/+18
2022-11-23drm/amdgpu: add missing license to some filesAlex Deucher2-0/+2
2022-07-13drm/amdgpu: Add reg headers for DCN314Roman Li2-0/+77077
2022-07-13drm/amdgpu: fix file permissions on some filesAlex Deucher2-0/+0
2022-07-05drm/amd/display: Add missing registers for ACPRodrigo Siqueira5-0/+10
2022-06-21drm/amd/display: add missing reg defs for DCN3x HUBBUBAurabindo Pillai4-0/+11
2022-06-03drm/amd: add register headers for DCN32/321Aurabindo Pillai4-0/+308702
2022-05-26drm/amd/display: Add HDMI_ACP_SEND registerAlan Liu4-2/+8
2022-02-18drm/amd/include: add DCN 3.1.5 registersQingqing Zhuo2-0/+77252
2022-02-17drm/amd/include: Add register headers for DCN 3.1.6Leo Li2-0/+78399
2022-02-07drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcsAlex Deucher2-1396/+0
2022-02-07drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcsAlex Deucher2-4152/+0
2022-02-07drm/amdgpu: add missing license to dpcs_3_0_0 headersAlex Deucher2-0/+14
2021-10-19drm/amd/display: Disable hdmistream and hdmichar clocksJake Wang2-0/+10
2021-09-29drm/amdgpu: add cyan_skillfish asic header filesZhan Liu2-0/+28284
2021-07-08drm/amd/display: DMUB Outbound Interrupt Process-X86Chun-Liang Chang1-0/+4
2021-06-15drm/amd/display: Add interface to get Calibrated Avg Level from FIFOWesley Chalmers2-0/+4
2021-06-04drm/amdgpu: add yellow carp asic header files (v3)Aaron Liu2-0/+75830
2021-05-19drm/amd/display: Edit license info for beige goby DC filesAurabindo Pillai4-37/+18
2021-05-19drm/amd/display: Add register definitions for Beige GobyAurabindo Pillai4-0/+45172
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.