blob: 8d581b3aac3a1b4d716f44bfcc1325149ec176e3 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/arm,versatile-fpga-irq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile FPGA IRQ Controller
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description:
One or more FPGA IRQ controllers can be synthesized in an ARM reference board
such as the Integrator or Versatile family. The output of these different
controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
instance can handle up to 32 interrupts.
properties:
compatible:
const: arm,versatile-fpga-irq
interrupt-controller: true
'#interrupt-cells':
const: 1
reg:
maxItems: 1
clear-mask:
description: A mask written to clear all IRQs on the controller at boot.
$ref: /schemas/types.yaml#/definitions/uint32
valid-mask:
description:
A bit mask determining which interrupts are valid; unused lines are set to 0.
$ref: /schemas/types.yaml#/definitions/uint32
interrupts:
maxItems: 1
additionalProperties: false
required:
- compatible
- interrupt-controller
- '#interrupt-cells'
- reg
- clear-mask
- valid-mask
examples:
- |
interrupt-controller@14000000 {
compatible = "arm,versatile-fpga-irq";
#interrupt-cells = <1>;
interrupt-controller;
reg = <0x14000000 0x100>;
clear-mask = <0xffffffff>;
valid-mask = <0x003fffff>;
};
|
