blob: ae813189f5ab62e8115394990085249519948df5 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-misc-intc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller
maintainers:
- Alban Bedel <albeu@free.fr>
- Alexander Couzens <lynxis@fe80.eu>
description:
The Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller is a secondary
controller for lower priority interrupts.
properties:
compatible:
oneOf:
- items:
- const: qca,ar9132-misc-intc
- const: qca,ar7100-misc-intc
- const: qca,ar7240-misc-intc
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
const: 1
additionalProperties: false
required:
- compatible
- reg
- interrupts
- interrupt-controller
- "#interrupt-cells"
examples:
- |
interrupt-controller@18060010 {
compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc";
reg = <0x18060010 0x4>;
interrupts = <6>;
interrupt-controller;
#interrupt-cells = <1>;
};
|