blob: 9d248ef7fe3d8111ae73339e6befc0dfb9f65045 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/snps,archs-intc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARC-HS incore Interrupt Controller
maintainers:
- Vineet Gupta <vgupta@kernel.org>
description:
ARC-HS incore Interrupt Controller provided by cores implementing ARCv2 ISA.
intc accessed via the special ARC AUX register interface, hence "reg" property
is not specified.
properties:
compatible:
const: snps,archs-intc
interrupt-controller: true
'#interrupt-cells':
const: 1
interrupts:
description: List of IRQ numbers between 16 and 256
items:
items:
- minimum: 16
maximum: 256
required:
- compatible
- interrupt-controller
- '#interrupt-cells'
- interrupts
additionalProperties: false
examples:
- |
interrupt-controller {
compatible = "snps,archs-intc";
interrupt-controller;
#interrupt-cells = <1>;
interrupts = <16>, <17>, <18>, <19>, <20>, <21>, <22>, <23>, <24>, <25>;
};
|