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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/marvell,armada8k-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell Armada 7K/8K PCIe interface
maintainers:
- Thomas Petazzoni <thomas.petazzoni@bootlin.com>
description:
This PCIe host controller is based on the Synopsys DesignWare PCIe IP.
select:
properties:
compatible:
contains:
enum:
- marvell,armada8k-pcie
required:
- compatible
allOf:
- $ref: snps,dw-pcie.yaml#
properties:
compatible:
items:
- enum:
- marvell,armada8k-pcie
- const: snps,dw-pcie
reg:
maxItems: 2
reg-names:
items:
- const: ctrl
- const: config
clocks:
minItems: 1
maxItems: 2
clock-names:
items:
- const: core
- const: reg
interrupts:
maxItems: 1
msi-parent:
maxItems: 1
phys:
minItems: 1
maxItems: 4
phy-names:
minItems: 1
maxItems: 4
marvell,reset-gpio:
maxItems: 1
deprecated: true
required:
- interrupt-map
- clocks
- msi-parent
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
pcie@f2600000 {
compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
reg = <0xf2600000 0x10000>, <0xf6f00000 0x80000>;
reg-names = "ctrl", "config";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
dma-coherent;
msi-parent = <&gic_v2m0>;
ranges = <0x81000000 0 0xf9000000 0xf9000000 0 0x10000>, /* downstream I/O */
<0x82000000 0 0xf6000000 0xf6000000 0 0xf00000>; /* non-prefetchable memory */
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
num-lanes = <1>;
clocks = <&cpm_syscon0 1 13>;
};
...
|
