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|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Power Management Controller
maintainers:
- J. Neuschäfer <j.ne@posteo.net>
description: |
The Power Management Controller in several MPC8xxx SoCs helps save power by
controlling chip-wide low-power states as well as peripheral clock gating.
Sleep of peripheral devices is configured by the `sleep` property, for
example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are
called a sleep specifier.
For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that
is set in the cell, the corresponding bit in SCCR will be saved and cleared
on suspend, and restored on resume. This sleep controller supports disabling
and resuming devices at any time.
For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
which will be ORed into PMCDR upon suspend, and cleared from PMCDR upon
resume. The first two cells are as described for fsl,mpc8548-pmc. This
sleep controller only supports disabling devices during system sleep, or
permanently.
For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one
or two cells, the first of which will be ORed into DEVDISR (and the second
into DEVDISR2, if present -- this cell should be zero or absent if the
hardware does not have DEVDISR2) upon a request for permanent device
disabling. This sleep controller does not support configuring devices to
disable during system sleep (unless supported by another compatible match),
or dynamically.
properties:
compatible:
oneOf:
- items:
- const: fsl,mpc8315-pmc
- const: fsl,mpc8313-pmc
- const: fsl,mpc8349-pmc
- items:
- enum:
- fsl,mpc8313-pmc
- fsl,mpc8323-pmc
- fsl,mpc8360-pmc
- fsl,mpc8377-pmc
- fsl,mpc8378-pmc
- fsl,mpc8379-pmc
- const: fsl,mpc8349-pmc
- items:
- const: fsl,p1022-pmc
- const: fsl,mpc8536-pmc
- const: fsl,mpc8548-pmc
- items:
- enum:
- fsl,mpc8536-pmc
- fsl,mpc8568-pmc
- fsl,mpc8569-pmc
- const: fsl,mpc8548-pmc
- enum:
- fsl,mpc8548-pmc
- fsl,mpc8641d-pmc
description: |
"fsl,mpc8349-pmc" should be listed for any chip whose PMC is
compatible. "fsl,mpc8313-pmc" should also be listed for any chip
whose PMC is compatible, and implies deep-sleep capability.
"fsl,mpc8548-pmc" should be listed for any chip whose PMC is
compatible. "fsl,mpc8536-pmc" should also be listed for any chip
whose PMC is compatible, and implies deep-sleep capability.
"fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
compatible; all statements below that apply to "fsl,mpc8548-pmc" also
apply to "fsl,mpc8641d-pmc".
Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
bit assignments are indicated via the sleep specifier in each device's
sleep property.
reg:
minItems: 1
maxItems: 2
interrupts:
maxItems: 1
fsl,mpc8313-wakeup-timer:
$ref: /schemas/types.yaml#/definitions/phandle
description:
For "fsl,mpc8313-pmc"-compatible devices, this is a phandle to an
"fsl,gtm" node on which timer 4 can be used as a wakeup source from deep
sleep.
allOf:
- if:
properties:
compatible:
contains:
const: fsl,mpc8349-pmc
then:
properties:
reg:
items:
- description: PMC block
- description: Clock Configuration block
- if:
properties:
compatible:
contains:
enum:
- fsl,mpc8548-pmc
- fsl,mpc8641d-pmc
then:
properties:
reg:
items:
- description: 32-byte block beginning with DEVDISR
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
pmc: power@b00 {
compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
reg = <0xb00 0x100>, <0xa00 0x100>;
interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
};
- |
power@e0070 {
compatible = "fsl,mpc8548-pmc";
reg = <0xe0070 0x20>;
};
...
|
