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| author |   Olof Johansson <olof@lixom.net> | 2019-05-15 22:51:48 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2019-05-15 22:51:48 -0700 |
| commit | 7a0c4c17089a8aff52f516f0f52002be52950aae (patch) | |
| tree | 474dc451d62a1ba788ed52c4cecf93f9e50cc39a /arch/mips/sgi-ip27/ip27-irq.c | |
| parent | Merge tag 'v5.2-rockchip-soc32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/soc (diff) | |
| parent | Merge tag 'davinci-fixes-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes (diff) | |
| download | linux-stable-7a0c4c17089a8aff52f516f0f52002be52950aae.tar.xz linux-stable-7a0c4c17089a8aff52f516f0f52002be52950aae.zip | |
Merge branch 'fixes' into arm/soc
Merge in a few pending fixes from pre-5.1 that didn't get sent in:
MAINTAINERS: update arch/arm/mach-davinci
ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect
ARM: dts: imx6q-logicpd: Reduce inrush current on USBH1
ARM: dts: imx6q-logicpd: Reduce inrush current on start
ARM: dts: imx: Fix the AR803X phy-mode
ARM: dts: sun8i: a33: Reintroduce default pinctrl muxing
arm64: dts: allwinner: a64: Rename hpvcc-supply to cpvdd-supply
ARM: sunxi: fix a leaked reference by adding missing of_node_put
ARM: sunxi: fix a leaked reference by adding missing of_node_put
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/mips/sgi-ip27/ip27-irq.c')
| -rw-r--r-- | arch/mips/sgi-ip27/ip27-irq.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 710a59764b01..a32f843cdbe0 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c @@ -118,7 +118,6 @@ static void shutdown_bridge_irq(struct irq_data *d) { struct hub_irq_data *hd = irq_data_get_irq_chip_data(d); struct bridge_controller *bc; - int pin = hd->pin; if (!hd) return; @@ -126,7 +125,7 @@ static void shutdown_bridge_irq(struct irq_data *d) disable_hub_irq(d); bc = hd->bc; - bridge_clr(bc, b_int_enable, (1 << pin)); + bridge_clr(bc, b_int_enable, (1 << hd->pin)); bridge_read(bc, b_wid_tflush); } |