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path: root/drivers/clk/at91/sam9x60.c (follow)
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* clk: at91: clk-sam9x60-pll: add support for parent_hwClaudiu Beznea2023-06-211-2/+2
* clk: at91: clk-system: add support for parent_hwClaudiu Beznea2023-06-211-1/+1
* clk: at91: clk-programmable: add support for parent_hwClaudiu Beznea2023-06-211-1/+1
* clk: at91: clk-peripheral: add support for parent_hwClaudiu Beznea2023-06-211-1/+1
* clk: at91: clk-master: add support for parent_hwClaudiu Beznea2023-06-211-2/+2
* clk: at91: clk-generated: add support for parent_hwClaudiu Beznea2023-06-211-1/+1
* clk: at91: clk-main: add support for parent_data/parent_hwClaudiu Beznea2023-06-211-2/+2
* clk: at91: mark ddr clocks as criticalClaudiu Beznea2023-01-091-4/+16
* clk: at91: clk-master: remove dead codeClaudiu Beznea2022-03-081-2/+1
* clk: at91: clk-sam9x60-pll: add notifier for div part of PLLClaudiu Beznea2021-10-261-3/+3
* clk: at91: sam9x60: remove atmel,osc-bypass supportAlexandre Belloni2020-12-191-5/+1
* clk: at91: clk-master: re-factor master clockClaudiu Beznea2020-12-191-7/+16
* clk: at91: clk-sam9x60-pll: allow runtime changes for pllClaudiu Beznea2020-12-191-4/+18
* clk: at91: sam9x60: support only two programmable clocksClaudiu Beznea2020-10-141-1/+1
* clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputsClaudiu Beznea2020-07-241-9/+41
* clk: at91: clk-programmable: add mux_table optionClaudiu Beznea2020-07-241-1/+2
* clk: at91: clk-peripheral: add support for changeable parent rateClaudiu Beznea2020-07-241-1/+1
* clk: at91: clk-generated: add mux_table optionClaudiu Beznea2020-07-241-1/+1
* clk: at91: clk-generated: pass the id of changeable parent at registrationClaudiu Beznea2020-07-241-2/+1
* clk: at91: sam9x60: fix main rc oscillator frequencyClaudiu Beznea2020-07-241-1/+1
* clk: at91: sam9x60-pll: check fcore against rangesClaudiu Beznea2020-07-241-1/+1
* clk: at91: fix possible dead lock in new driversAhmad Fatoum2020-07-241-1/+1
* clk: at91: allow setting all PMC clock parents via DTMichał Mirosław2020-05-261-1/+3
* clk: at91: allow setting PCKx parent via DTMichał Mirosław2020-05-261-1/+3
* clk: at91: optimize pmc data allocationMichał Mirosław2020-05-261-1/+1
* clk: at91: sam9x60: fix usb clock parentsClaudiu Beznea2020-02-121-3/+2
* clk: at91: sam9x60: Don't use audio PLLCodrin Ciubotariu2020-02-121-6/+3
* clk: at91: sam9x60: fix programmable clock prescalerEugen Hristev2020-01-051-0/+1
* clk: at91: sam9x60: fix programmable clockEugen Hristev2019-10-031-0/+1
* clk: at91: Mark struct clk_range as constStephen Boyd2019-04-251-2/+2
* clk: at91: add sam9x60 pmc driverAlexandre Belloni2019-04-251-0/+307