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author | 2013-03-19 14:17:18 +0100 | |
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committer | 2014-05-13 13:12:40 +0200 | |
commit | 7b4d915e11ae7afb2d42a8cae90db26bc0c142b8 (patch) | |
tree | db995bf60250dcc148d438b6cd6f90d3d40bb850 | |
parent | target-i386: preserve FPU and MSR state on INIT (diff) | |
download | qemu-7b4d915e11ae7afb2d42a8cae90db26bc0c142b8.tar.xz qemu-7b4d915e11ae7afb2d42a8cae90db26bc0c142b8.zip |
apic: do not accept SIPI on the bootstrap processor
SIPI interrupts are ignored on the bootstrap. Never accept one.
Cc: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | hw/intc/apic_common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 71376533ca..ce3d903b13 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -200,7 +200,7 @@ void apic_init_reset(DeviceState *dev) s->initial_count = 0; s->initial_count_load_time = 0; s->next_time = 0; - s->wait_for_sipi = 1; + s->wait_for_sipi = !cpu_is_bsp(s->cpu); if (s->timer) { timer_del(s->timer); |