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author | 2014-01-06 10:16:40 +0000 | |
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committer | 2014-01-08 19:07:21 +0000 | |
commit | 38acd64b1cc8b9589e155d16ba4a0ccf9dc95ae4 (patch) | |
tree | 17f8a3309f283f2ccb971924bcfaf36809cc7588 /fpu/softfloat.c | |
parent | char/cadence_uart: Delete redundant rx rst logic (diff) | |
download | qemu-38acd64b1cc8b9589e155d16ba4a0ccf9dc95ae4.tar.xz qemu-38acd64b1cc8b9589e155d16ba4a0ccf9dc95ae4.zip |
char/cadence_uart: Implement Tx flow control
If the UART back-end blocks, buffer in the Tx FIFO to try again later.
This stops the IO-thread busy waiting on char back-ends (which causes
all sorts of performance problems).
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 4bea048b3ab38425701d82ccc1ab92545c26b79c.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'fpu/softfloat.c')
0 files changed, 0 insertions, 0 deletions