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| author |   Max Filippov <jcmvbkbc@gmail.com> | 2017-02-17 16:39:30 -0800 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-01-09 09:55:39 -0800 |
| commit | d1e9b0068ac9544297042f1c4bbbf1a31a3eee3b (patch) | |
| tree | c25081aeb60c2792f98ed072f2bb325c068ce918 /hw/misc/omap_clk.c | |
| parent | target/xtensa: add internal/noop SRs and opcodes (diff) | |
| download | qemu-d1e9b0068ac9544297042f1c4bbbf1a31a3eee3b.tar.xz qemu-d1e9b0068ac9544297042f1c4bbbf1a31a3eee3b.zip | |
target/xtensa: implement salt/saltu
SALT/SALTU are recent additions to the core Xtensa ISA that do
signed/unsigned setcond.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'hw/misc/omap_clk.c')
0 files changed, 0 insertions, 0 deletions