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author | 2023-02-04 11:23:12 +0300 | |
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committer | 2023-02-07 08:19:23 +1000 | |
commit | 5fc0fc8788e08f151f5d0c47d205e009aeb33844 (patch) | |
tree | e898f43897d6a7c0e803a18c0fb729f82e068aa2 /scripts/coverage/compare_gcov_json.py | |
parent | target/riscv: fix for virtual instr exception (diff) | |
download | qemu-5fc0fc8788e08f151f5d0c47d205e009aeb33844.tar.xz qemu-5fc0fc8788e08f151f5d0c47d205e009aeb33844.zip |
target/riscv: fix ctzw behavior
According to spec, ctzw should work with 32-bit register, not 64.
For example, previous implementation returns 33 for (1<<33) input
when the new one returns 32.
Signed-off-by: Vladimir Isaev <vladimir.isaev@syntacore.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230204082312.43557-1-vladimir.isaev@syntacore.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/coverage/compare_gcov_json.py')
0 files changed, 0 insertions, 0 deletions