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authorBernhard Beschow <shentey@gmail.com>2023-01-26 22:17:36 +0100
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2023-02-27 22:29:02 +0100
commit7ae8e6c9a21bff7db376a8b1b135dffa0bb920d6 (patch)
tree33aea675367c193c77806def0a37b8219ce571b6 /scripts/coverage/compare_gcov_json.py
parenthw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS (diff)
downloadqemu-7ae8e6c9a21bff7db376a8b1b135dffa0bb920d6.tar.xz
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hw/ide/pci: Add PCIIDEState::isa_irq[]
These legacy ISA IRQs allow the PIIX IDE functions to be wired up in their south bridges and the VIA IDE functions to disuse PCI_INTERRUPT_LINE as outlined in https://lists.nongnu.org/archive/html/qemu-devel/2020-03/msg01707.html Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230126211740.66874-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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