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| author |   Richard Henderson <richard.henderson@linaro.org> | 2024-04-22 10:07:22 -0700 |
|---|---|---|
| committer |   Peter Maydell <peter.maydell@linaro.org> | 2024-04-30 15:01:07 +0100 |
| commit | 7b19a3554d2df22d29c75319a1dac17615d1b20e (patch) | |
| tree | 8e18b57d647f6562d854055d20302a633a7fb8e3 /scripts/coverage/compare_gcov_json.py | |
| parent | hvf: arm: Remove PL1_WRITE_MASK (diff) | |
| download | qemu-7b19a3554d2df22d29c75319a1dac17615d1b20e.tar.xz qemu-7b19a3554d2df22d29c75319a1dac17615d1b20e.zip | |
target/arm: Restrict translation disabled alignment check to VMSA
For cpus using PMSA, when the MPU is disabled, the default memory
type is Normal, Non-cachable. This means that it should not
have alignment restrictions enforced.
Cc: qemu-stable@nongnu.org
Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation disabled")
Reported-by: Clément Chigot <chigot@adacore.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Clément Chigot <chigot@adacore.com>
Message-id: 20240422170722.117409-1-richard.henderson@linaro.org
[PMM: trivial comment, commit message tweaks]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/coverage/compare_gcov_json.py')
0 files changed, 0 insertions, 0 deletions