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authorLIU Zhiwei <zhiwei_liu@linux.alibaba.com>2023-02-13 17:45:50 +0800
committerPalmer Dabbelt <palmer@rivosinc.com>2023-02-23 14:21:34 -0800
commit8c89d50c10afdd98da82642ca5e9d7af4f1c18bd (patch)
treed6e60c77cfb61d090d3a4a72d1b0cf816651fb7b /scripts/coverage/compare_gcov_json.py
parenttarget/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state() (diff)
downloadqemu-8c89d50c10afdd98da82642ca5e9d7af4f1c18bd.tar.xz
qemu-8c89d50c10afdd98da82642ca5e9d7af4f1c18bd.zip
target/riscv: Fix vslide1up.vf and vslide1down.vf
vslide1up_##BITWIDTH is used by the vslide1up.vx and vslide1up.vf. So its scalar input should be uint64_t to hold the 64 bits float register.And the same for vslide1down_##BITWIDTH. This bug is caught when run these instructions on qemu-riscv32. Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-ID: <20230213094550.29621-1-zhiwei_liu@linux.alibaba.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/coverage/compare_gcov_json.py')
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